In this project, I designedand simulated, using HSPICE,atwo stage CMOS operational amplifier based on the 0.35μmprocess. I introduced two design topologies that meet the following specifications,as outlined in the table below. Both designs usea nulling resistor to boost the gain magnitude while keeping the phase margin under control, so that the system is stable.
The nulling resistor can be used to either eliminate the Right Hand Plane, RHP, zero or move it to the Left Hand Plane, LHP. I implemented the nulling resistor using an NMOSoperating in triode mode, instead of adiscrete resistor, for better circuit performance, and more control ofthetrans-conductance gm.
The designed operational amplifier in both designs is meant to meet the specifications, even when there is a ±10% variation of the DC input of the supply voltage, Vdd. The entire discussions and results are in the link blow:
Design of a Two Stage CMOS Differential Input Opamp
Youtube presentation:
https://www.youtube.com/watch?v=_NnF1yAMm-I&t=281s
If you like this posting or have any questions, please drop us a feedback in the comments section!
Embedded Design 